Name: JTAG SMT2
SKU: Ajitek SMT2
Price: 5200 INR
Availability: InStock

home

Home

help

Help

where-to-buy

Where to Buy

company

Company

home2

Home2

about-us

About Us

contact-us

Contact Us

services

all-products

Products

fpga-boards

FPGA Boards

spartan-6-fpga-boards

Spartan 6 FPGA Boards

spartan-3-fpga-boards

Spartan 3 FPGA Boards

artix-7-fpga-boards

Artix 7 FPGA Boards

jtag-programming-cables

JTAG Programming Cables

jtag-hs3

JTAG HS3

jtag-hs2

JTAG HS2

jtah-smt2

JTAH SMT2

test-and-mesurement-products

Test And Mesurement Products

siglent-products

SIglent Products

usb-scopes-instrume

USB Scopes, Instrume

relay-modules

Relay Modules

usb-relay-modules

USB Relay Modules

ethernet-relay-module

Ethernet Relay Module

Footer

Header

The joint test action group (JTAG)-SMT2 is a compact, complete and fully self-contained surface-mount programming module for Xilinx® field-programmable gate arrays (FPGAs). The module can be accessed directly from all Xilinx tools, including iMPACT™, ChipScope™, and EDK. Users can load the module directly onto a target board and reflow it like any other component. 

The JTAG-SMT2 uses a 3.3V main power supply and a separate Vref supply to drive the JTAG signals. All JTAG signals use high speed, 24mA, three-state buffers that allow signal voltages from 1.8V to 5V and bus speeds of up to 30MBit/sec. The JTAG bus can be shared with other devices as systems hold JTAG signals at high-impedance, except when actively driven during programming. The SMT2 module is CE certified and fully compliant with EU RoHS and REACH directives. The module uses a standard Type-A to Micro-USB cable available for purchase from Digilent, Inc. 

Users can connect JTAG signals directly to the corresponding FPGA signals. For best results, mount the module adjacent to the edge of the host PCB over a ground plane. Although users may run signal traces on top of the host PCB beneath the SMT2, Digilent recommends keeping the area immediately beneath the SMT2 clear. Note: Keep the impedance between the SMT2 and FPGA below 100 Ohms to operate the JTAG at maximum speed. The SMT2 improves upon the SMT1 with the addition of three general purpose IO pins (GPIO0 – GPIO2) and support for interfacing IEEE 1149.7-2009 JTAG targets in both 2 and 4-wire modes.

JTAG SMT2